In integrated circuits, there is generally a piece of silicon known as a die or chip which contains electrical circuits. The chip has bonding pads which are used as interconnection points to other circuitry. For example, the chip may be connected to a lead frame by tiny wires. The lead frame in turn has leads which are used for connecting to a printed circuit board as part of a larger system. The leads of the lead frame have a certain amount of inductance as well as capacitance and resistance. There is also some inductance in the wire connecting the bonding pad to the lead frame. The wire inductance, however, is significantly less than that of the lead frame. The connection of a lead of the lead frame to a circuit board also adds some inductance. As the switching speeds of integrated circuits have increased, this cumulative inductance has begun to have an impact on the performance of the integrated circuit.
Of course it is desirable to have integrated circuits which are very fast. The increased switching speed has also increased the rate at which current changes. This increased rate of current change causes a voltage drop across the inductance. The voltage across an inductance is equal to the inductance times the time rate of change of the current through that inductance. This is expressed as Ldi/dt, where L is the inductance and di/dt is the time rate of change of the current. As the di/dt becomes larger, the voltage across the inductance becomes larger. This voltage drop across an inductance causes a voltage differential between the lead location on the circuit board and the bonding pad to which it is connected on the integrated circuit. This can create a problem of having the internal supply at a different voltage than the voltage of the external supply. This problem can cause the internal supply voltages to differ by so much from their external levels that signals input to the chip are recognized incorrectly.
Several known output buffer circuits provide di/dt control along with fast speed. In recent years, integrated circuit fabrication techniques have provided the ability to manufacture both MOS transistors and bipolar transistors on a single integrated circuit. The use of bipolar transistors improves the speed of output buffers because bipolar transistors generally switch faster than MOS transistors. However, the use of bipolar transistors creates additional problems. One problem is that the increased rate of switching of output buffers with bipolar transistors has worsened the di/dt problem. New circuits are required to take advantage of the improved switching speed of bipolar transistors while maintaining acceptable levels for di/dt.
A second problem results from the fact that bipolar transistors degrade in the reverse biased condition and as reverse bias increases, the amount of degradation increases. Therefore using bipolar transistors with a large reverse bias is subject to reliability problems in that the transistors may degrade over time, ultimately resulting in a failure of the entire integrated circuit.
A third problem arises from the nature of a bipolar transistor itself. In the bipolar transistor, a junction capacitance exists between the P and N areas of silicon. The junction capacitance arises from the minority charge-storing capacity of a PN junction. For example, an NPN transistor has a base-emitter capacitance at the PN base-emitter junction. Minority (N-type) carriers are stored in the P-type base near the junction, and minority (P-type) carriers are stored in the N-type emitter near the junction. The capacitance, sometimes referred to as the diffusion capacitance, represents the ability of the P-type base and the N-type emitter to store minority charge near the junction. The capacitance is determined in part by the bias on the PN junction, and as the forward bias increases, the capacitance also increases.
In some circumstances, the base-emitter capacitance can be significant enough to affect circuit perfomance. In a circuit using a bipolar transistor as an emitter follower, the base-emitter capacitance can affect the output voltage on the emitter after the base voltage changes. In the emitter-follower configuration, when the voltage on the base increases, the voltage on the emitter follows, rising by the same amount. The expected voltage on the emitter is equal to the voltage on the base, minus one base-to-emitter diode voltage drop (V.sub.BE). However under certain circumstances, the voltage on the base may be self-boosted by the effect of the base-emitter capacitance. When the voltage applied to the base rises quickly, and the load connected to the emitter is highly capacitive, a large base-to-emitter voltage can develop. Then as the voltage on the emitter rises, a bootstrap effect increases the base voltage due to the base-emitter capacitance. If the loading is sufficiently capacitive, then the voltage on the base rises beyond the voltage applied. Eventually, the voltage on the emitter follows the voltage on the base minus V.sub.BE. If there is no path to discharge the base-emitter capacitor, the voltage on the emitter remains above the desired voltage level. For some circuit applications, such as output buffers, the possibility that the output voltage will self-boost beyond the desired value is harmful to operation of the circuit.
A fourth problem is that output buffers must be able to operate well under a variety of load conditions. With improved technology, many integrated circuits now are able to operate at less than the standard 5-volt power supply voltage, such as at a power supply voltage of 3.3 volts. This increases the number of possible load types which the output buffer must drive. The loads can be generally characterized as being one of four types. In one type, the output buffer drives a signal through a transmission line which terminates at an integrated circuit having a 5-volt power supply. If the output signal provided by the output buffer exceeds 5 volts plus one diode drop, then the voltage across a diode on the integrated circuit exceeds its cutin voltage and the signal is clamped to 5 volts plus one diode drop. A second type is modeled as a transmission line terminating in an integrated circuit with a lower power supply voltage, such as 3.3 volts. A diode clamps the output signal to 3.3 volts plus one diode drop. A third type is a standard TTL load having a resistance of approximately 480 ohms between the signal line and a 5-volt power supply voltage terminal, a resistance of approximately 255 ohms between the signal line and the ground power supply voltage terminal, and a capacitance of approximately 30 picofarads (pF) to ground. A fourth type is an open circuit. Thus, an expanding range of possible load types to which the output buffer may be connected requires new approaches.